About the job
Astera Labs develops advanced rack-scale AI infrastructure, specializing in innovative connectivity for modern AI workloads. The company partners with hyperscalers and ecosystem collaborators to deliver solutions that integrate CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor technologies with the COSMOS software suite. This approach supports unified, flexible systems that scale easily, while custom solutions complement standards-based offerings. Learn more at www.asteralabs.com.
Role overview
This PhD internship focuses on Analog/Mixed-Signal IC Design (SerDes) and will be based in either Irvine, CA or San Jose, CA. The intern will join a team dedicated to advanced node CMOS products and high-performance connectivity solutions.
What you will do
- Design and verify analog and mixed-signal integrated circuits for advanced node CMOS products
- Develop and validate circuits such as PLLs, DLLs, ADCs, regulators, amplifiers, transmitters, receivers, and CDRs
- Ensure circuits meet strict performance standards for connectivity applications
- Work on analog and clocking blocks for high-speed data interfaces
- Use industry-standard tools, including Spectre and MATLAB, for design and verification
Who we’re looking for
Astera Labs seeks a motivated designer with a strong interest in analog and mixed-signal circuit design. Curiosity about advanced connectivity products and a collaborative approach to engineering are important in this role.
