Compiler Engineer at Cerebras Systems | Sunnyvale, CA

Cerebras SystemsSunnyvale, CA

On-site Full-time

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Experience Level

Entry Level

Qualifications

The ideal candidate will possess a strong background in compiler design and implementation, with familiarity in programming languages and low-level hardware interactions. Experience with MLIR and LLVM is highly desirable. A Bachelor's degree in Computer Science, Software Engineering, or a related field is preferred.

About the job

Cerebras Systems is at the forefront of AI technology, creating the world's largest AI chip, 56 times the size of traditional GPUs. Our innovative wafer-scale architecture delivers the computational power of dozens of GPUs on a single chip while simplifying programming to the ease of a single device. This groundbreaking approach enables us to achieve unparalleled training and inference speeds, empowering machine learning professionals to seamlessly execute large-scale ML applications without the complexities of managing numerous GPUs or TPUs.

Cerebras serves an impressive clientele that includes top model laboratories, multinational corporations, and pioneering AI-native startups. Recently, OpenAI announced a multi-year partnership with Cerebras, deploying 750 megawatts of scale to revolutionize critical workloads with ultra-high-speed inference.

Our wafer-scale architecture also powers the fastest Generative AI inference solution globally, exceeding GPU-based hyperscale cloud inference services by over 10 times. This significant enhancement in speed is transforming the user experience of AI applications, facilitating real-time iteration and boosting intelligence through additional computational capabilities.

About The Role

We are in search of a talented Compiler Engineer to contribute to the design and implementation of new features within our CSL (Cerebras Software Language) compiler. CSL is a Zig-like programming language utilized both internally and externally to program our wafer-scale engine (WSE).

The language offers high-level abstractions to simplify programming the wafer WSE while providing low-level access to hardware internals for optimal hardware utilization. The compiler leverages MLIR infrastructure to translate CSL into LLVM IR, which is further compiled by a dedicated LLVM mid-end/backend into executable files.

Responsibilities

Design and implement front-end language features, semantic analysis, intermediate representations, and lowering pipelines from CSL to MLIR dialect(s) and LLVM IR.
Develop and enhance abstraction layers between the CSL language and the underlying hardware.

About Cerebras Systems

Cerebras Systems is a pioneer in AI chip technology, known for its revolutionary wafer-scale architecture that significantly enhances AI training and inference speeds. By simplifying the programming of large-scale machine learning applications, Cerebras Systems is transforming the landscape of AI computation.

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Compiler Engineer at Cerebras Systems | Sunnyvale, CA

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Infrastructure Hardware Technical Program Manager (Server and Network Systems)

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Full-time|On-site|Sunnyvale CA or Toronto Canada

Cerebras Systems is pioneering the field of artificial intelligence with the development of the world's largest AI chip, which is 56 times larger than traditional GPUs. Our innovative wafer-scale architecture delivers the computational power equivalent to dozens of GPUs on a single chip, simplifying programming to a single device. This breakthrough allows Cerebras to achieve unparalleled training and inference speeds, enabling machine learning practitioners to seamlessly run extensive ML applications without the complexity of managing numerous GPUs or TPUs. Our clientele includes leading model labs, global corporations, and cutting-edge AI-native startups. Cerebras recently formed a transformative multi-year partnership with OpenAI, focusing on deploying 750 megawatts of scale to enhance critical workloads through ultra-fast inference. Thanks to our unique wafer-scale architecture, Cerebras Inference provides the fastest Generative AI inference solution globally, outperforming GPU-based hyperscale cloud services by over ten times. This dramatic increase in speed is revolutionizing the user experience of AI applications, facilitating real-time iterations and enhancing intelligence through additional agentic computation. As an Infrastructure Hardware Technical Program Manager (Server and Network Systems) within the Cluster Architecture Team, you will oversee the comprehensive delivery of server and network platform programs across Cerebras CS-3-based AI clusters. Your responsibilities will range from requirements gathering and vendor selection to lab bring-up, qualification, and production rollout. You will act as the execution lead for multi-team programs involving OEM/ODM partners, component vendors, internal software/runtime teams, architects, validation/QA, and deployment/operations.This position requires a strong technical background; you should grasp server, network, and system-level trade-offs to effectively conduct technical reviews, keep programs aligned with real-world constraints, and maintain clear decision documentation. Collaborating closely with Compute, Server, and Network Platform Architects, you will ensure detailed technical direction and approval. Additionally, you will work to establish mutual understanding with our rack/elevations and physical data center design partners to ensure server and network modifications are implemented smoothly in real deployments (without directly managing physical data center design).

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