Lead Engineer in AI Subsystems Physical Design

At Tenstorrent, we are at the forefront of pioneering AI technology, challenging the norms of performance, usability, and cost-effectiveness. As AI reshapes the landscape of computing, we are committed to evolving our solutions to integrate advancements in software models, compilers, platforms, networking, and semiconductor technologies. Our dynamic team has…

Join Tenstorrent as an AI/ML Physical Design Flow Engineer and contribute to our cutting-edge projects that leverage artificial intelligence and machine learning in physical design processes. You will work closely with a talented team to develop and optimize design flows, ensuring efficiency and high performance in our systems.

Join our innovative team at Skyways as a Subsystem Test Engineer. In this pivotal role, you will be responsible for designing, developing, and executing test procedures for complex subsystems that are critical to our operations. You will work collaboratively with cross-functional teams to ensure product quality and reliability, contributing to the overall success of our projects.

About Etched Etched builds the first AI inference system tailored for transformers, delivering over 10x higher performance with lower cost and latency than conventional approaches. The company’s ASIC technology powers advanced products, from real-time video generation to sophisticated reasoning agents. Backed by leading investors and staffed by top engineers, Etched is focused on reshaping the infrastructure that supports the fast-moving AI sector. Role Overview The Senior Physical Design Engineer will play a central role in block-level implementation and verification. This position focuses on driving timing closure and optimizing power, performance, and area (PPA). The engineer will oversee third-party design partners and help refine internal workflows to accelerate design cycles. What You Will Do Develop a deep understanding of physical design challenges and solutions Run physical design flows to achieve block closure, improve ASIC infrastructure, and automate design steps Work closely with RTL designers, offering feedback to improve PPA Create dashboards to monitor project convergence in physical design Refine tool flows and collaborate with EDA vendors to adopt new technologies Take responsibility for achieving block-level closure Manage relationships with third-party physical design service providers Who We’re Looking For 5 to 10+ years of hands-on experience in physical design Strong background in tools, flows, and methodologies from RTL synthesis through GDSII sign-off Proven track record in back-end design and timing closure on advanced nodes (5nm and below) Familiarity with Cadence (Innovus, Genus) or Synopsys (ICC2, Fusion Compiler) automated RTL-to-GDSII flows Experience using sign-off tools such as PrimeTime, Tempus, Voltus, and similar Knowledge of UPF-based low power design, power verification, synthesis, scan insertion/ATPG, formal verification, floorplanning, placement, CTS, routing, IR drop, and EM/antenna analysis Creative thinker with strong problem-solving skills Location Austin

Join Tenstorrent as a Physical Design Engineer, where you will be at the forefront of cutting-edge semiconductor design. This role will involve working collaboratively with cross-functional teams to develop robust and efficient physical designs, ensuring optimal performance and manufacturability of our next-generation products.

At Tenstorrent, we are pioneering advancements in AI technology, setting new benchmarks for performance, usability, and cost-effectiveness. As AI transforms the computing landscape, our solutions are designed to integrate innovations across software models, compilers, platforms, networking, and semiconductors. Our talented team of technologists has built a high-performance RISC-V CPU from the ground up, driven by a shared enthusiasm for AI and a commitment to developing an exceptional AI platform. We prioritize collaboration, curiosity, and a dedication to tackling challenging problems. As we expand our team, we invite contributors of all experience levels to join us.We are looking for skilled Physical Design Engineers to develop high-performance blocks for our state-of-the-art CPU and AI/ML architectures. In this role, you'll manage the entire implementation process from synthesis to tapeout, collaborating with leading engineers to push the limits of performance, power, and area. If you are passionate about designing silicon that drives the future of AI computing and enjoy solving intricate design challenges, we would love to have you as part of our team.This position is hybrid, based in Austin, TX, Santa Clara, CA, or Fort Collins, CO.We welcome applicants with diverse experience levels. During the interview process, we will evaluate candidates to align offers with their respective skill levels, which may differ from the one stated in this posting.

Wehrtyou is seeking a Physical Design Engineer to develop advanced physical layouts for semiconductor products. This role directly shapes hardware design and implementation, balancing high performance with manufacturability. Key responsibilities Create and refine physical layouts for semiconductor devices Collaborate with multidisciplinary teams to optimize designs Ensure layouts comply with industry standards for quality and reliability Support product delivery from initial concept through manufacturing Locations Austin, TX, United States Boulder, Colorado, United States Chicago, Illinois, United States London, United Kingdom New York, NY, United States Seattle, Washington, United States Work culture Engineers at Wehrtyou contribute to projects that help shape the future of technology. The team emphasizes collaboration, technical growth, and practical problem-solving.

At Tenstorrent, we are at the forefront of revolutionary AI technology, setting new benchmarks for performance, usability, and cost-effectiveness. As AI reshapes the computing landscape, our solutions adapt to integrate innovations across software models, compilers, platforms, networking, and semiconductors. Our talented team has engineered a high-performance RISC-V CPU from the ground up, driven by a passion for AI and a commitment to developing the premier AI platform. We foster a culture of collaboration, curiosity, and a relentless pursuit of solving complex challenges. We are expanding our team and are eager to welcome contributors of all experience levels.We are currently seeking a Senior Staff Physical Design Engineer specializing in EMIR to join our silicon team. In this pivotal role, you will spearhead electromigration (EM) and IR-drop simulations, ensuring resilient power delivery, signal integrity, and long-lasting reliability for high-performance integrated circuits (ICs). Collaborating closely with RTL, physical design, and analysis teams, you will execute power grid strategies that enhance performance, power efficiency, and area (PPA), especially at advanced nodes such as 7nm and below. Your expertise will also support EMIR sign-off and waiver methodologies across the chip hierarchy.This is a hybrid position based out of either Austin, TX or Santa Clara, CA.We encourage candidates from various experience backgrounds to apply. During the interview process, we will assess candidates for the appropriate level, and our offers will be aligned accordingly, which may differ from this posting.

Neuralink develops devices that connect directly with the human brain. The company’s technology focuses on restoring movement for people with paralysis, improving vision for those with impairments, and changing how people interact with digital systems. The Brain Interfaces Hardware Department leads the design of chip architecture and silicon systems for neural recording and stimulation. This group works on system-on-chip (SoC) solutions that support high-bandwidth brain-machine interfaces. Team members include engineers committed to advancing neurotechnology. Role overview The Physical Design and Verification Engineer manages the full physical design flow from RTL to GDSII. This includes: Synthesis Placement Clock tree synthesis Detailed routing Optimization Physical signoff verification Locations This position is based in Austin, Texas or Fremont, California.

At Tenstorrent, we are at the forefront of AI technology, transforming performance benchmarks, usability, and cost-effectiveness in the industry. As AI reshapes the computing landscape, our solutions are designed to integrate innovations across software models, compilers, platforms, networking, and semiconductors. With a passionate team of technologists, we have engineered a high-performance RISC-V CPU from the ground up, driven by our enthusiasm for AI and our commitment to creating the premier AI platform. We prioritize collaboration, curiosity, and a relentless pursuit of challenging problems. Join us as we expand our team and welcome contributors of all experience levels.We are currently on the lookout for a SoC Physical Design Verification Engineer who will take charge of full-chip signoff and guarantee the manufacturability and high quality of silicon across advanced technology nodes. In this role, you'll spearhead physical verification closures (DRC, LVS, ERC, etc.), troubleshoot issues using standard industry PV tools, and work alongside RTL, PD, CAD, and packaging teams to ensure successful tapeouts. If you thrive in a dynamic environment and relish tackling intricate challenges in cutting-edge silicon, we want to hear from you.This position is hybrid, based in Santa Clara, CA; Austin, TX; or Fort Collins, CO.We invite applicants of various experience levels for this role. During the interview process, we will assess candidates for the appropriate level, and offers will be made accordingly, which may differ from the one in this posting.

Join our innovative team as an ASIC Physical Design Engineer in the vibrant city of Austin, Texas. In this role, you will leverage your expertise to design and implement cutting-edge ASIC physical layouts, ensuring high performance and reliability.As a key member of our engineering department, you'll collaborate with cross-functional teams to drive projects from conception through to completion, all while adhering to strict timelines and quality standards.

Join our innovative team at Braze as a Lead Design Engineer, where you'll play a crucial role in shaping our product's design and functionality. Your expertise will guide the design process, ensuring that our solutions are not only functional but also aesthetically pleasing and user-friendly. You will collaborate with cross-functional teams, utilizing your technical skills to lead design projects from concept to completion.

At Tenstorrent, we are at the forefront of pioneering AI technology, setting new standards for performance, user experience, and cost efficiency. As AI transforms the computing landscape, our solutions are evolving to integrate advanced software models, compilers, platforms, networking, and semiconductor innovations. Our dynamic team of technologists has engineered a high-performance RISC-V CPU from the ground up, driven by a shared enthusiasm for AI and a dedication to creating the best AI platform available. We prioritize teamwork, inquisitiveness, and a relentless pursuit of tackling challenging problems. We are expanding our team and are eager for contributors of all experience levels to join us.We are searching for an outstanding Senior SoC Physical Design Engineer to lead the top-level implementation of our intricate AI and CPU SoC designs. In this role, you will facilitate cross-disciplinary collaboration, crafting advanced floorplans, power grids, and clock networks, while ensuring design closure at the chip level. If you possess a talent for navigating the complexities of full-chip physical design and aspire to deliver next-generation AI hardware, your expertise is needed here.This position is hybrid, with work based out of Santa Clara, CA; Austin, TX; or Fort Collins, CO.We encourage applications from candidates of varying experience levels. During the interview process, we will assess candidates for the appropriate seniority level, and compensation will reflect that level, which may differ from what is stated in this posting.

Senior to Lead Product DesignerLocation: Austin, TX (Hybrid on-site, with up to 30% travel)Requirement: U.S. citizenship with the ability to obtain security clearance.About NODA AINODA AI is a pioneering, veteran-owned technology firm that is revolutionizing the collaboration of unmanned systems in intricate, mission-critical scenarios. Our innovative solutions facilitate the autonomous orchestration of diverse unmanned systems across air, sea, land, and space, with significant applications in defense, intelligence, and commercial fields.We are developing a comprehensive tactical military interface platform that acts as the command center for essential operations. Our product designers create experiences that empower operators to adeptly manage complex data from unmanned systems and make critical decisions in high-pressure environments.Joining NODA AI means engaging in impactful technology that expands the limits of autonomy while working with a team that values innovation, rapid iteration, and collaboration.The RoleWe are in search of a Senior to Lead Product Designer who will spearhead the design vision and execution for our tactical military interface platform. The ideal candidate will adeptly convert intricate operational requirements into user-friendly, mission-critical interfaces while upholding design excellence throughout the product lifecycle. Collaborating at the crossroads of user needs, technical limitations, and business goals, you will craft experiences that empower military operators in high-stakes environments. This position offers a pathway to evolve into a design leadership role as our team and product grow.Key ResponsibilitiesLead the comprehensive product design for core functionalities including battle management, asset tracking, operational planning, and event monitoring interfaces.Collaborate with product managers, engineers, and military stakeholders to define product requirements and translate them into elegant design solutions.Create detailed design specifications encompassing interaction patterns, component states, precise measurements, and visual specifications for engineering implementation.Conduct user research with military operators and stakeholders to understand workflows, pain points, and operational requirements in tactical environments.Design and prototype intricate interfaces for real-time data visualization, tactical mapping, and intuitive user interactions.

Join Stanley Consultants, an esteemed global consulting engineering firm recognized for its commitment to culture, ethics, and client satisfaction. We tackle complex challenges to foster a sustainable and interconnected world while adapting to technological advancements and resilient practices.With over a century of experience across energy, federal government, transportation, and water sectors, we are shaping the infrastructure that enhances lives. As an employee-owned organization, we prioritize a "People First" approach, valuing your voice, growth, and success.We provide flexible work arrangements, competitive compensation, comprehensive benefits, and the opportunity to build a fulfilling, long-term career.

At Tenstorrent, we are at the forefront of pioneering AI technology, setting new benchmarks for performance, usability, and cost-effectiveness. As AI reshapes the computing landscape, our solutions must adapt to integrate advances in software modeling, compilers, platforms, networking, and semiconductors. Our diverse group of technologists has successfully crafted a high-performance RISC-V CPU from the ground up, driven by a shared enthusiasm for AI and a relentless pursuit to create the finest AI platform. We cherish collaboration, curiosity, and a steadfast commitment to tackling complex challenges. As we expand our team, we invite contributors at all experience levels to join us.We are currently seeking a Timing Engineer to enhance our silicon team. In this pivotal role, you will spearhead static timing analysis and closure for intricate, high-performance designs. You will work in close partnership with logic, DFT, and physical design teams to troubleshoot constraints, optimize timing paths, and ensure our chips meet performance objectives across various corners and modes.This position is hybrid, based in Austin, TX, Fort Collins, CO, or Santa Clara, CA.We encourage candidates of all experience levels to apply. Throughout the interview process, candidates will be evaluated for their fit, and offers will correspond to the assessed level, which may differ from the one stated in this posting.

About FluidstackAt Fluidstack, we are at the forefront of building the compute, data centers, and power systems that will drive the evolution of artificial superintelligence. Collaborating with industry leaders such as Anthropic, Google, Meta, AMI Labs, and Black Forest Labs, we aim to deploy gigawatts of compute at unparalleled speeds. Our commitment to investing tens of billions in U.S. infrastructure is set to materialize with a 1GW deployment in 2026 and 10GW in 2027.Our team is compact, agile, and dedicated to delivering excellence. We take ownership of outcomes, challenge the status quo, and embrace our customers' challenges as our own. Here, no task is too small for anyone.Join the few thousand individuals who will influence the future of superintelligence.About The RoleAs the Lead Mechanical Engineer, you will serve as a senior technical authority within Fluidstack’s Design and Engineering team. Your mission is to establish the mechanical cooling strategy and oversee the design process from chip to chiller across multiple sites housing some of the world's largest AI data centers.This role is pivotal, requiring you to set the technical vision for cooling tens of thousands of GPUs through both air-cooled and liquid-cooled setups, chilled water systems, heat rejection methodologies, and innovative thermal management solutions. You will define the specifications for modular, prefabricated mechanical assemblies, ensuring rapid deployment and adaptability for future compute needs. Additionally, you will lead a growing team of mechanical engineers and collaborate with electrical, controls, structural, and construction teams to deliver cutting-edge cooling infrastructure swiftly and efficiently.We have recently unveiled a $50 billion partnership with Anthropic to develop custom data centers in New York and Texas with additional locations on the horizon. This position will be instrumental in shaping the mechanical systems that make such ambitious projects feasible.

Join Tenstorrent as a Full-Chip Physical Design Verification Engineer, where you will play a pivotal role in ensuring the integrity and performance of our cutting-edge semiconductor designs. You will collaborate closely with cross-functional teams to validate full-chip designs, enhancing their functionality, reliability, and efficiency.Your expertise will be crucial in developing and executing verification plans, identifying and resolving issues, and contributing to the advancement of our innovative technology. If you are driven by a passion for excellence and are eager to work in a dynamic environment, we want to hear from you!

At American Housing Corporation, we are dedicated to addressing America’s housing crisis through innovative production techniques. Our belief is that the affordability crisis in housing stems from a production issue, and our vertically integrated approach is designed to tackle this challenge effectively: we acquire land, manufacture, install, and directly sell homes to our customers. This method enables us to build at the scale necessary to make a significant impact on this crisis.The American Dream is not inherited; it is built. We are searching for the most talented engineers, designers, and builders to help us tackle one of America’s toughest challenges.As a Lead Mechanical Design Engineer within our Build System Engineering team, you will be instrumental in the design and production of our proprietary build system, which consists of a comprehensive kit-of-parts for constructing high-quality multifamily housing.

About Future Secure AI Future Secure AI develops artificial intelligence solutions for major global enterprises. The team tackles real-world challenges across multiple industries, working with advanced technology in an environment that values bravery, thoroughness, and curiosity. The company’s BRAVER values shape its culture and expectations. Leadership is both entrepreneurial and approachable, and every team member is recognized as an individual. Professional growth is a priority, with ongoing investment in development. Employees collaborate with experienced colleagues and contribute to meaningful projects. Role Overview: Senior AI & Enablement Lead The Senior AI & Enablement Lead plays a central role in expanding AI adoption throughout the organization. This position focuses on educating teams about AI and giving them the tools to use it effectively. The Lead develops frameworks for self-service workflows, with an emphasis on practical applications in Engineering, Quality Assurance, Data Science, and AI Engineering. Success in this role requires technical depth, skill in instructional design, and a strong interest in helping others succeed with generative AI. Location Austin, TX