About the job
Join Tenstorrent, a pioneer in advanced AI technology, where we are reshaping performance standards, user experience, and cost effectiveness in computing. As AI transforms the technological landscape, we are committed to integrating innovations across software models, compilers, platforms, networking, and semiconductors. Our talented team has built a high-performance RISC-V CPU from the ground up, driven by a collective enthusiasm for AI and an unwavering commitment to create the premier AI platform. We cherish collaboration, curiosity, and a shared mission to tackle challenging problems. We are expanding our team and invite applicants of all experience levels.
The Staff Design for Test (DFT) Engineer will play a crucial role in developing high-performance designs for leading AI/ML architectures. This position involves comprehensive engagement in all aspects of implementation, from RTL to tapeout for various IP components on the chip. Key challenges include minimizing testing costs while achieving high coverage and facilitating debug and yield learning with minimal design interference. You will collaborate with a team of seasoned engineers across multiple ASIC domains.
This position is hybrid, based in either Santa Clara, CA or Austin, TX.
We encourage candidates with diverse experience levels to apply. During the interview process, candidates will be evaluated for the appropriate level, and compensation offers will be aligned accordingly.
